Fig 1. Embedded RFID tag solution on a target chip – largely
implemented using digital IP blocks ported in the same process
as target chip.
Fig 2. (a) Dual-phase RF only concept of operation; (b) RF
supply waveforms
Fig 3. Block diagram of the RF-only logic based Gen2 tag
Publications:
- K. Bhanushali, W. Zhao, W. S. Pitts and P. D. Franzon, “A 125 μm × 245 μm Mainly Digital UHF EPC Gen2 Compatible RFID Tag in 55 nm CMOS Process,” in IEEE Journal of Radio Frequency Identification, vol. 5, no. 3, pp. 317-323, Sept. 2021.
- K. Bhanushali, W. Pitts, P. Franzon, “Embedded RFID for Chip Asset Tracking,” in Proc. Gomactech 2021.
- K. Bhanushali, W. Zhao, W. Pitts, P. Franzon, “A 125um x 245 um Mainly Digital UHF EPC Gen2 Compatible RFID tag in 55 nm CMOS procesK. Bhanushali, W. Zhao and P. D. Franzon, “Design of a Rectifier-Free Near-Threshold UHF Gen2 RFID Tag using Dual-Phase RF-only Logic,” 2018 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S), Burlingame, CA, USA, 2018, pp. 1-3s,” in Proc. IEEE RFID, April, 2021. Best paper award.
- W. Zhao, K. Bhanushali and P. Franzon, “Design of a rectifier-free UHF Gen-2 compatible RFID Tag using RF-only logic,” 2016 IEEE International Conference on RFID (RFID), Orlando, FL, 2016, pp. 1-6.
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