In this completed project, currently being commerialized, we built hardware accelarators for key algorithms used in automatic speech recognition, and investigated the hardware/software tradeoffs involved, using Electronic System Level (ESL) modeling.
This work was funded by Spansion.
Selected Publications (with links to a copy of the paper):
- Bapat, O.A.; Franzon, P.D.; Fastow, R.M., “A Generic and Scalable Architecture for a Large Acoustic Model and Large Vocabulary Speech Recognition Accelerator Using Logic on Memory,” Very Large Scale Integration (VLSI) Systems, IEEE Transactions on , vol.PP, no.99, pp.1,1, 2014. (Downloadable paper.)
- Bapat, O.A.; “A Generic, Scalable Architecture for a Large Acoustic Model and Large Vocabulary Speech Recognition Accelerator“, Ph.D. Dissertation, 2012 . (Downloadable.)